The rapid scaling of high-performance computing and AI is placing increasing thermal demands on advanced chip packages, where localized heat fluxes exceeding 1,000 W/cm² can limit system performance, reliability, and lifetime. In current packaging concepts, thermal management is often constrained by thermal interface materials (TIMs), which introduce thermal resistance, complicate co-design of chip and package, and limit the integration of functionality.
To answer this question, the project pursues three objectives. Objective 1 focuses on the thermodynamic design of novel interlayer alloy feedstocks with reduced thermal mismatch, enabling reliable bonding between silicon chips and high-conductivity materials. Objective 2 investigates how multi-material additive manufacturing can control interfacial reactions to produce crack-free metal–silicon bonds across micrometer-to-centimeter length scales. Objective 3 translates these insights into production-relevant processes through scale-up and industrial validation with partners.
By embedding cooling functionality directly within the package, this project advances new materials, processes, and integrated functionalities central to the Advanced Chip Packaging, contributing to improved performance, reduced environmental impact, and a strengthened Dutch and European semiconductor ecosystem.