Quantum technologies define one of the most promising technological developments of the twenty first century. While current-day quantum systems are rapidly increasing in size, practical quantum computation will require scaling these systems to millions of integrated qubits. This scaling challenge might well be resolved by using semiconductor qubit technology, as these qubits are based on the design of a transistor: the most integrated component ever made.

However, scaling of the quantum processor by itself is not enough: controlling this processor requires many individual control signals connecting the processor to the outside world. In fact, routing of the input/output lines of a quantum processor, poses one of the main challenges for most current-generation quantum systems. As a result, most of the available space in state-of-the-art quantum systems is dedicated to hundreds of coaxial cables that carry the signals required for qubit control. While more scalable wiring solutions exist, for example in the form of flexible high-density wiring, defining an equally high-density interface to the processor chip is often challenging, because of the stringent requirements on signal integrity and bandwidth that many quantum technologies pose.

This project intends to combine advanced flexible wiring and interfacing technologies with the resilience of germanium semiconductor qubit technology, to define a scalable interface between high-density wiring and a quantum processor chip. This interface will be validated using a small scale proof-of-principle to ensure it does not negatively impact QPU performance, thereby enabling scaling to thousands of input/output lines for next-generation scalable semiconductor quantum computing technologies.